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DS2252T Secure Microcontroller Module
www.dalsemi.com
FEATURES
8051-compatible microcontroller for secure/sensitive applications - 32, 64, or 128 kbytes of nonvolatile SRAM for program and/or data storage - In-system programming via on-chip serial port - Capable of modifying its own program or data memory in the end system Firmware security features: - Memory stored in encrypted form - Encryption using on-chip 64-bit key - Automatic true random key generator - SDI (Self-Destruct Input) - Improved security over previous generations - Protects memory contents from piracy Crashproof operation - Maintains all nonvolatile resources for over 10 years in the absence of power - Power-fail Reset - Early Warning Power-fail Interrupt - Watchdog Timer - Precision reference for power monitor Fully 8051-compatible - 128 bytes scratchpad RAM - Two timer/counters - On-chip serial port - 32 parallel I/O port pins Permanently powered real time clock
PACKAGE OUTLINE
1
20
21
40
40-Pin SIMM
DESCRIPTION
The DS2252T Secure Microcontroller Module is an 8051-compatible microcontroller based on nonvolatile RAM technology. It is designed for systems that need to protect memory contents from disclosure. This includes key data, sensitive algorithms, and proprietary information of all types. Like other members of the Secure Microcontroller family, it provides full compatibility with the 8051 instruction set, timers, serial port, and parallel I/O ports. By using NV RAM instead of ROM, the user can program, then reprogram the microcontroller while in-system. This allows frequent changing of sensitive processes with minimal effort. The DS2252T provides an array of mechanisms to prevent an attacker from examining the memory. It is designed to resist all levels of threat including observation, analysis, and physical attack. As a result, a massive effort would be required to obtain any information about 1 of 15 011800
DS2252T
memory contents. Furthermore, the "Soft" nature of the DS2252T allows frequent modification of secure information. This minimizes that value of any information that is obtained. Using a security system based on the DS5002FP, the DS2252T protects the memory contents from disclosure. It loads program memory via its serial port and encrypts it in real time prior to storing it in SRAM. Once encrypted, the RAM contents and the program flow are unintelligible. The real data exists only inside the processor chip after being decrypted. Any attempt to discover the on-chip data, encryption keys, etc., results in its destruction. Extensive use of nonvolatile lithium-backed technology creates a microcontroller that retains data for over 10 years at room temperature, but which can be erased instantly if tampered with. The DS2252T even interfaces directly to external tamper protection hardware. The DS2252T provides a permanently powered real time lock with interrupts for time stamp and date. It keeps time to one hundredth of a second using its onboard 32 kHz crystal. Like other Secure Microcontrollers in the family, the DS2252T provides crashproof operation in portable systems or systems with unreliable power. These features include the ability to save the operating state, Power-fail Reset, Power-fail Interrupt, and Watchdog Timer. All nonvolatile memory and resources are maintained for over 10 years at room temperature in the absence of power. A user loads programs into the DS2252T via its on-chip Serial Bootstrap Loader. This function supervises the loading of software into NV RAM, validates it, then becomes transparent to the user. It also manages the loading of new encryption keys automatically. Software is stored in onboard CMOS SRAM. Using its internal Partitioning, the DS2252T can divide a common RAM into user selectable program and data segments. This Partition can be selected at program loading time, but can be modified anytime later. The microcontroller will decode memory access to the SRAM, access memory via its Bytewide bus and write-protect the memory portion designated as program (ROM). A detailed summary of the security features is provided in the User's Guide section of the Secure Microcontroller data book. An overview is also available in the DS5002FP data sheet.
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DS2252T
DS2252T BLOCK DIAGRAM Figure 1
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DS2252T
PIN ASSIGNMENT
1 2 3 4 5 6 7 8 9 10 P1.0 VCC P1.1 P0.0 P1.2 P0.1 P1.3 P0.2 P1.4 P0.3 11 12 13 14 15 16 17 18 19 20 P1.5 P0.4 P1.6 P0.5 P1.7 P0.6 RST P0.7 P3.0 RXD SDI 21 22 23 24 25 26 27 28 29 30 P3.1 TXD ALE P3.2 INT0
PROG
31 32 33 34 35 36 37 38 39 40
P3.6 WR P2.4 P3.7 RD P2.3 XTAL2 P2.2 XTAL1 P2.1 GND P2.0
P3.3 INT1 P2.7 P3.4 T0 P2.6 P3.5 T1 P2.5
PIN DESCRIPTION
PIN DESCRIPTION 4, 6, 8, 10, P0.0 - P0.7. General purpose I/O Port 0. This port is open-drain and can not drive a logic 12, 14, 16, 1. It requires external pullups. Port 0 is also the multiplexed Expanded Address/Data bus. 18 When used in this mode, it does not require pullups. 1, 3, 5, 7, 9, 11, 13, 15 P1.0 - P1.7. General purpose I/O Port 1.
40, 38, 36, P2.0 - P2.7. General purpose I/O Port 2. Also serves as the MSB of the Expanded 34, 32, 30, Address bus. 28, 26 19 21 23 25 27 29 31 33 17 P3.0 RXD. General purpose I/O port pin 3.0. Also serves as the receive signal for the on board UART. This pin should NOT be connected directly to a PC COM port. P3.1 TXD. General purpose I/O port pin 3.1. Also serves as the transmit signal for the on board UART. This pin should NOT be connected directly to a PC COM port. P3.2 INT0 . General purpose I/O port pin 3.2. Also serves as the active low External Interrupt 0. This pin is also connected to the INTP output of the DS1283 Real Time Clock. P3.3 INT1 . General purpose I/O port pin 3.3. Also serves as the active low External Interrupt 1. P3.4 T0. General purpose I/O port pin 3.4. Also serves as the Timer 0 input. P3.5 T1. General purpose I/O port pin 3.5. Also serves as the Timer 1 input. P3.6 WR . General purpose I/O port pin. Also serves as the write strobe for Expanded bus operation. P3.7 RD . General purpose I/O port pin. Also serves as the read strobe for Expanded bus operation. RST - Active high reset input. A logic 1 applied to this pin will activate a reset state. This pin is pulled down internally, can be left unconnected if not used. An RC power-on reset circuit is not needed and is NOT recommended. 4 of 15
DS2252T
PIN 22 35, 37 39 2 24
DESCRIPTION ALE - Address Latch Enable. Used to de-multiplex the multiplexed Expanded Address/Data bus on Port 0. This pin is normally connected to the clock input on a '373 type transparent latch. XTAL2, XTAL1. Used to connect an external crystal to the internal oscillator. XTAL1 is the input to an inverting amplifier and XTAL2 is the output. GND - Logic ground. VCC - +5V.
PROG - Invokes the Bootstrap loader on a falling edge. This signal should be debounced so that only one edge is detected. If connected to ground, the microcontroller will enter Bootstrap loading on power up. This signal is pulled up internally.
20
SDI - Self-Destruct Input. A logic 1 applied to this input causes a hardware unlock. This involves the destruction of Encryption Keys, Vector RAM, and the momentary removal of power from VCCO. This pin should be grounded if not used.
INSTRUCTION SET
The DS2252T executes an instruction set that is object code-compatible with the industry standard 8051 microcontroller. As a result, software development packages such as assemblers and compilers that have been written for the 8051 are compatible with the DS2252T. A complete description of the instruction set and operation are provided in the User's Guide section of the Secure Microcontroller Data Book.
MEMORY ORGANIZATION
Figure 2 illustrates the memory map accessed by the DS2252T. The entire 64k of program and 64k of data are available to the Byte-wide bus. This preserves the I/O ports for application use. An alternate configuration allows dynamic Partitioning of a 64k space as shown in Figure 3. Any data area not mapped into the NV RAM is reached via the Expanded bus on Ports 0 and 2. Off-board program memory is not available for security reasons. Selecting PES=1 provides access to the Real Time Clock as shown in Figure 4. These selections are made using Special Function Registers. The memory map and its controls are covered in detail in the User's Guide section of the Secure Microcontroller Data Book.
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DS2252T
DS2252T MEMORY MAP IN NON-PARTITIONABLE MODE (PM=1) Figure 2
FFFFh --
PROGRAM MEMORY
DATA MEMORY (MOVX)
-- 64K
NV RAM PROGRAM
NV RAM DATA
0000h --
DS2252T MEMORY MAP IN PARTITIONABLE (PM=0) Figure 3
FFFFh --
PROGRAM MEMORY
DATA MEMORY (MOVX)
NV RAM DATA
PARTITION
NV RAM PROGRAM
0000h --
NOTE: PARTITIONABLE MODE IS NOT SUPPORTED ON THE 128KB VERSION OF THE DS2252T. LEGEND: = NV RAM MEMORY = EXPANDED BUS (PORTS 0 AND 2) = NOT AVAILABLE
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DS2252T
DS2252T MEMORY MAP WITH (PES=1) Figure 4
FFFFh --
PROGRAM MEMORY
DATA MEMORY (MOVX)
-- 64K
C000h -PARTITION
B000h --
NV RAM PROGRAM
4000h --
-- 16K
REAL-TIME CLOCK
0000h --
= NOT ACCESSIBLE
POWER MANAGEMENT
The DS2252T monitors VCC to provide Power-fail Reset, early warning Power-fail Interrupt, and switchover to lithium backup. It uses an internal band-gap reference in determining the switch points. These are called VPFW, VCCMIN, and VLI respectively. When VCC drops below VPFW, the DS2252T will perform an interrupt vector to location 2Bh if the power-fail warning is enabled. Full processor operation continues regardless. When power falls further to VCCMIN, the DS2252T invokes a reset state. No further code execution will be performed unless power rises back above VCCMIN. All decoded chip enables and the R/ W signal go to an inactive (logic 1) state. VCC is still the power source at this time. When VCC drops further to below VLI, internal circuitry will switch to the built-in lithium cell for power. The majority of internal circuits will be disabled and the remaining nonvolatile states will be retained. The User's Guide has more information on this topic. The trip points VCCMIN and VPFW are listed in the electrical specifications.
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DS2252T
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground Voltage on VCC Relative to Ground Operating Temperature2 Storage Temperature Soldering Temperature
1
-0.3V to (VCC + 0.5V) -0.3V to +6.0V -40C to +85C -55C to +125C 260C for 10 seconds
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Storage temperature is defined as the temperature of the device when VCC=0V and VLI=0V. In this state the contents of SRAM are not battery-backed and are undefined.
2
DC CHARACTERISTICS
PARAMETER Input Low Voltage Input High Voltage Input High Voltage (RST, XTAL1, PROG ) Output Low Voltage @ IOL=1.6 mA (Ports 1, 2, 3) Output Low Voltage @ IOL=3.2 mA (Ports 0, ALE) Output High Voltage @ IOH= -80 A (Ports 1, 2, 3) Output High Voltage @ IOH=-400 A (Ports 0, ALE) Input Low Current VIN = 0.45V (Ports 1, 2, 3) Transition Current; 1 to 0 VIN = 2.0V (Ports 1, 2, 3) Input Leakage Current 0.45 < VIN < VCC (Port 0) RST Pulldown Resistor Power Fail Warning Voltage Minimum Operating Voltage Operating Current @ 16 MHz Idle Mode Current @ 12 MHz Stop Mode Current Pin Capacitance VIL VIH1 VIH2 VOL1 VOL2 VOH1 VOH2 IIL ITL IIL RRE VPRW VCCMIN ICC IIDLE ISTOP CIN
(tA=0C to 70C; VCC=5V 10%)
SYMBOL MIN TYP -0.3 2.0 3.5 0.15 0.15 2.4 2.4 4.8 4.8 -50 -500 10 40 4.25 4.00 4.37 4.12 150 4.50 4.25 45 7.0 80 10 MAX +0.8 VCC+0.3 VCC+0.3 0.45 0.45 UNITS V V V V V V V A A A k V V mA mA A pF 1 1 4 5 6 7 NOTES 1 1 1 1 1 1 1
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DS2252T
DC CHARACTERISTICS (continued)
Reset Trip Point in Stop Mode w/BAT=3.0V w/BAT=3.3V SDI Input High Voltage SDI Input High Voltage SDI PullDown Resistor VIHS VIHS RSDI
(tA=0C to 70C; VCC=5V 10%)
4.0 4.4 2.0 2.0 25 4.25 4.65 VCC 3.5 60 V V V k 1 1, 2 1, 2
AC CHARACTERISTICS
PARAMETER SDI Pulse Reject (4.5V < VCC < 5.5V) (VCC=0V, VBAT=2.9V) SDI Pulse Accept (4.5V < VCC < 5.5V) (VCC=0V, VBAT=2.9V) SYMBOL tSPR MIN
(tA=0C to 70C; VCC=0V to 5V)
TYP MAX 2 4 10 50 UNITS s NOTES 10
tSPA
s
10
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DS2252T
AC CHARACTERISTICS: EXPANDED BUS MODE TIMING SPECIFICATIONS
# 1 2 3 4 14 15 16 17 18 19 20 21 22 23 24 25 26 27 PARAMETER Oscillator Frequency ALE Pulse Width Address Valid to ALE Low Address Hold After ALE Low
RD
(tA=0C to70C; VCC=5V 10%)
SYMBOL 1/tCLK tALPW tAVALL tAVAAV tRDPW tWRPW MIN 1.0 2tCLK -40 tCLK -40 tCLK -35 6tCLK -100 6tCLK -100 5tCLK -165 5tCLK -105 0 2tCLK -70 8CLK -150 8tCLK -90 9tCLK -165 9tCLK -105 3tCLK -50 4tCLK -130 tCLK -60 7tCLK -150 7tCLK -90 tCLK -50 0 tCLK -40 tCLK +50 3tCLK +50 MAX 16 (-16) UNITS MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Pulse Width Pulse Width Low to Valid Data In @ 12 MHz @ 16 MHz
WR
RD
tRDLDV tRDHDV tRDHDZ
Data Hold after RD High Data Float after RD High ALE Low to Valid Data In Valid Addr. to Valid Data In ALE Low to RD or WR Low Address Valid to RD or WR Low Data Valid to WR Going Low Data Valid to WR High Data Valid after WR High
RD RD
@ 12 MHz @ 16 MHz @ 12 MHz @ 16 MHz
tALLVD tAVDV tALLRDL tAVRDL tDVWRL
@ 12 MHz @ 16 MHz
tDVWRH tWRHDV tRDLAZ tRDHALH
Low to Address Float or WR High to ALE High
EXPANDED DATA MEMORY READ CYCLE
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DS2252T
EXPANDED DATA MEMORY WRITE CYCLE
AC CHARACTERISTICS (continued) EXTERNAL CLOCK DRIVE
# 28 29 30 31 PARAMETER External Clock High Time External Clock Low Time External Clock Rise Time External Clock Fall Time @ 12 MHz @ 16 MHz @ 12 MHz @ 16 MHz @ 12 MHz @ 16 MHz @ 12 MHz @ 16 MHz tCLKHPW tCLKLPW tCLKR tCLKF
(tA=0C to70C; VCC=5V 10%)
SYMBOL MIN 20 15 20 15 20 15 20 15 MAX UNITS ns ns ns ns ns ns ns ns
EXTERNAL CLOCK TIMING
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DS2252T
AC CHARACTERISTICS (continued) POWER CYCLING TIMING
# 32 33 34 PARAMETER Slew Rate from VCCMIN to 3.3V Crystal Start-up Time Power-On Reset Delay tF tCSU tPOR
(tA=0C to70C; VCC=5V 10%)
SYMBOL MIN 130 (note 8) 21504 tCLK MAX UNITS s
POWER CYCLE TIMING
AC CHARACTERISTICS (cont'd) SERIAL PORT TIMING - MODE 0
# 35 36 37 38 39 PARAMETER Serial Port Clock Cycle Time Output Data Setup to Rising Clock Edge Output Data Hold after Rising Clock Edge Clock Rising Edge to Input Data Valid Input Data Hold after Rising Clock Edge tSPCLK tDOCH tCHDO tCHDV tCHDIV
(tA=0C to70C; VCC=5V 10%)
SYMBOL MIN 12tCLK 10tCLK -133 2tCLK -117 10tCLK -133 0 MAX UNITS s ns ns ns ns
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DS2252T
SERIAL PORT TIMING - MODE 0
NOTES:
1. All voltage referenced to ground. 2. SDI should be taken to a logic high when VCC=+5V, and to approximately 3V when VCC<3V. 3. SDI is deglitched to prevent accidental destruction. The pulse must be longer than tSPR to pass the deglitcher, but SDI is not guaranteed unless it is longer than tSPA. 4. Maximum operating ICC is measured with all output pins disconnected; XTAL1 driven with tCLKR, tCLKF=10 ns, VIL = 0.5V; XTAL2 disconnected; RST = PORT0 = VCC. 5. Idle mode IIDLE is measured with all output pins disconnected; XTAL1 driven with tCLKR, tCLKF= 10 ns, VIL = 0.5V; XTAL2 disconnected; PORT0 = VCC, RST = VSS. 6. Stop mode ISTOP is measured with all output pins disconnected; PORT0 = VCC; XTAL2 not connected; RST = XTAL1 = VSS. 7. Pin capacitance is measured with a test frequency - 1 MHz, tA= 25C. 8. Crystal start-up time is the time required to get the mass of the crystal into vibrational motion from the time that power is first applied to the circuit until the first clock pulse is produced by the on-chip oscillator. The user should check with the crystal vendor for a worst case specification on this time.
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DS2252T
PACKAGE DRAWING
PKG DIM A B C D E F G H I J K L M N O P INCHES MIN 2.645 2.379 0.995 0.395 0.245 MAX 2.655 2.389 1.005 0.405 0.255
0.050 BSC 0.075 0.245 0.085 0.255
0.950 BSC 0.120 1.320 1.445 0.057 0.047 0.130 1.330 1.455 0.067 0.300 0.165 0.054
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DATA SHEET REVISION SUMMARY
The following represent the key differences between 12/13/95 and 08/16/96 version of the DS2252T data sheet. Please review this summary carefully. 1. Change VCC slew rate specification to reference 3.3V instead of VLI. 2. Add minimum value to PCB thickness. The following represent the key differences between 08/16/96 and 05/28/97 version of the DS2252T data sheet. Please review this summary carefully. 1. AC characteristics for battery-backed SDI pulse specification added. The following represent the key differences between 05/28/97 and 11/08/99 version of the DS2252T data sheet. Please review this summary carefully. (PCN I80903) 1. Correct Absolute Maximum Ratings to reflect changes to DS5002FP microprocessor. 2. Add note clarifying that SRAM contents are not defined under storage temperature conditions. The following represent the key differences between 11/08/99 and 01/18/00 version of the DS2252T data sheet. Please review this summary carefully. 1. Datasheet conversion from Interleaf to Word.
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